Search Results - electrical+%3e+computing+hardware

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Multi-Level Scheduling and Partitioning of Reconfigurable Processor Arrays (Case No. 2026-011) Circular Elevator Style Network-on-Chip (Case No. 2026-012) and Pattern Compilation for Runtime Reconfigurable Arrays (Case No. 2026-013)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a high-speed runtime reconfigurable processor array (RTRA) that enables on-chip scheduling and rapid multi-program execution with unprecedented energy and area efficiency for dynamic computing workloads. Background: Dynamic digital signal processing...
Published: 12/11/2025   |   Inventor(s): Dejan Markovic, Hong Seok Lee, Chenkai Ling
Keywords(s): computational efficiency, computational efficiency and analysis, edge computing, energy-efficient, Hardware, high speed, large-area arrays, low latency computing, low-power architecture, Microarray, Microprocessor, processor design, programming, scalable manufacturing, System On A Chip
Category(s): Electrical > Signal Processing, Electrical, Electrical > Electronics & Semiconductors, Software & Algorithms, Electrical > Computing Hardware
CDMA MIMO Readout Networks for Semiconductor-Based Compact 2-Dimensional Qubit Array (Case No. 2025-153)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel CDMA-MIMO qubit readout network that enables scalable, high-fidelity measurement of two-dimensional semiconductor qubit arrays for fault-tolerant quantum computing. Background: Qubit arrays form the foundation of complex quantum computations...
Published: 12/12/2025   |   Inventor(s): Mau-Chung Chang, Jhih-Wei Chen
Keywords(s): computational efficiency, computational efficiency and analysis, Electrical, Electrical Engineering, Electronics & Semiconductors, large-area arrays, quantum communication, Quantum Computer, quantum error correction (QEC), quantum network, quantum processing, quantum processor, Semiconductor, Semiconductor Device, Semiconductors
Category(s): Electrical, Electrical > Computing Hardware, Electrical > Electronics & Semiconductors, Electrical > Quantum Computing, Software & Algorithms > Communication & Networking, Software & Algorithms
Monitoring Structural Health Using Diffractive Optical Processors (Case No. 2025-201)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel structural health monitoring system that is highly accurate and cost effective, addressing limitations in current infrastructure and civil health monitoring and a rise in public safety concerns. Background: The need for structural health monitoring...
Published: 12/5/2025   |   Inventor(s): Aydogan Ozcan, Ertugrul Taciroglu, Yuntian Wang, Yuhang Li
Keywords(s): 3D structures, Adaptive Optics, AI-generated images and content, all-optical diffractive computing, all-optical transformation, analog computing, analog optical computing, Analogue Electronics, Artifical Intelligence (Machine Learning, Data Mining), Artificial Intelligence, artificial intelligence algorithms, artificial intelligence augmentation, artificial intelligence/machine learning models, artificial-intelligent materials, civil engineering, civil infrastructure, civil monitoring, computational imaging, computational imaging task, Construction, deep diffractive network, Diffraction, diffractive design, diffractive image reconstruction, diffractive network, diffractive processor, diffractive surface, digital image reconstruction, electromagnetic spectrum, Electro-Optics, Image Analysis, Image Processing, Image Resolution, image restoration, image signal processing, Imaging, Infrastructure, Lens (Optics), linear optics, Nanostructure, optical processor, optically-guided structural monitoring, Optics, passive light-matter interactions, security imaging, Signal Reconstruction, Structural health monitoring, structural health monitoring (SHM), structure monitoring, Structures
Category(s): Electrical, Electrical > Signal Processing, Electrical > Imaging, Materials, Materials > Construction Materials, Electrical > Visual Computing, Electrical > Computing Hardware, Electrical > Instrumentation, Energy & Environment, Energy & Environment > Energy Efficiency, Software & Algorithms, Software & Algorithms > Artificial Intelligence & Machine Learning, Software & Algorithms > Image Processing, Software & Algorithms > Programs
Prototype Software for Neuron-Centric Memory Architecture in AI (Case Nos. 2025-327/328)
Summary: Researchers at UCLA’s Department of Integrative Biology & Physiology and Neurobiology have pioneered the first prototype of a novel, neuron-centric AI architecture featuring intracellular memory and adaptive computation capabilities, designed to enhance deep learning performance and efficiency. Background: Deep learning leverages...
Published: 12/10/2025   |   Inventor(s): Alain Glanzman, David Glanzman
Keywords(s): Artifical Intelligence (Machine Learning, Data Mining), Artificial Intelligence, artificial intelligence algorithms, artificial intelligence augmentation, artificial intelligence/machine learning models, artificial intelligence-generated content, Artificial Neural Network, Artificial Neural Network Artificial Neuron, artificial-intelligent materials, generative artificial intelligence, Medical artificial intelligence (AI), Neuron, neurons, Software, Software & Algorithms, Software Development Tools, Software-enabled learning
Category(s): Software & Algorithms, Software & Algorithms > AI Algorithms, Software & Algorithms > Artificial Intelligence & Machine Learning, Electrical, Electrical > Computing Hardware
Fine-Grained Power-Gating Circuitry in FPGA Interconnects (Case No. 2013-181)
Summary UCLA researchers have invented a method and circuit architecture for fine-grained power gating within FPGA (field-programmable gate array) interconnects. By selectively disabling (power gating) unused multiplexers and routing segments at a fine granularity, the approach reduces leakage power in FPGA interconnects while preserving performance...
Published: 9/23/2025   |   Inventor(s): Chengcheng Wang, Dejan Markovic
Keywords(s):  
Category(s): Electrical, Electrical > Electronics & Semiconductors, Electrical > Signal Processing, Electrical > Computing Hardware, Materials, Materials > Semiconducting Materials
Multilevel Buffered Link (Case No. 2025-284)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel on-chip link that enhances communication performance and energy efficiency in modern integrated circuits. Background: On-chip communication enables data transfer between microchip components and is critical in computing, automotive, and industrial...
Published: 11/17/2025   |   Inventor(s): Sudhakar Pamarti, Chih-Kong Yang, Haris Suhail
Keywords(s): Bandwidth (Signal Processing), buffer layer, Clock Signal, efficiency bandwidth products, Electrical, Electrical Engineering, Energy Efficiency, energy efficient IoT, energy-efficient, high-data-rate links, high-speed communications, IoT communication, large bandwidth, low-power device, Network On A Chip, scalable communication, scalable fabrication, Signaling pathways, Signal-To-Noise Ratio, System On A Chip
Category(s): Electrical, Electrical > Electronics & Semiconductors > Circuits, Electrical > Computing Hardware, Software & Algorithms > Communication & Networking, Electrical > Signal Processing
Method and System for Removing Stimulation Artifact in Neural Recording System Under Arbitrary Waveform Stimulations (Case No. 2024-010)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel hard-ware based system for real-time removal of stimulation artifacts in neural recordings, enabling greater scalability, flexibility, and efficiency in neuromodulation and neurotechnology applications. Background: Neuromodulation research depends...
Published: 8/29/2025   |   Inventor(s): Wentai Liu, Yan-Peng Chen
Keywords(s): Brain Mapping, Electrical, Electrical Brain Stimulation, Electrical stimulation, Electrode, electrodes, graph neural network, High-resolution, image and video enhancement, Image Resolution, large range, large-area arrays, Memory, neural network, neural networks, neural signals, neural stimulation, operating range, resolution, video processing
Category(s): Life Science Research Tools, Medical Devices > Neural Stimulation, Electrical > Computing Hardware, Electrical, Medical Devices
Event-Driven Integrate and Fire (EIF) Neuron Circuit for Neuromorphic Computing System (Case No. 2024-275)
Summary: Researchers in the UCLA Department of Electrical and Computer Engineering have developed an energy efficient neuromorphic computing architecture. Background: Widespread growth in demand for artificial intelligence systems has highlighted limitations in current central processing unit (CPU) designs, particularly in terms of energy efficiency...
Published: 11/18/2025   |   Inventor(s): Mau-Chung Chang, Chao Jen Tien, Yong Hei
Keywords(s): Advanced Computing / AI, advanced computing methods, AI hardware, analog computing, Artifical Intelligence (Machine Learning, Data Mining), artificial electromagnetic materials, Artificial Intelligence, artificial intelligence algorithms, artificial intelligence augmentation, artificial intelligence/machine learning models, artificial intelligence-generated content, Artificial Neural Network, Artificial Neural Network Artificial Neuron, artificial presenting cells, artificial-intelligent materials, Cloud Computing, computational efficiency, computational imaging, compute-in-memory, Computer Aided Learning, Computer Architecture, Computer Monitor, Computer Vision, CPU design, deep neural networks (DNN), Energy Density, Energy Efficiency, event-driven processing, generative artificial intelligence, latency encoding, low latency computing, low-power architecture, matrix multiplication, Medical artificial intelligence (AI), Neuromorphic computing, offline learning, online learning, spike neural networks (SNN), Supercomputer
Category(s): Electrical, Electrical > Signal Processing, Electrical > Electronics & Semiconductors, Electrical > Computing Hardware, Software & Algorithms, Software & Algorithms > Artificial Intelligence & Machine Learning
In-Situ Stochastic Computing in Memory (Case No. 2024-121)
Summary: Researchers in the UCLA Department of Electrical and Computer Engineering have developed a data-converter-free in-memory computing circuit that greatly reduces data processing latencies. Background: Low latency and low power computing circuitry is in high demand for artificial intelligence (AI) / machine learning (ML) applications. Compute...
Published: 2/20/2025   |   Inventor(s): Sudhakar Pamarti, Jiyue Yang
Keywords(s):  
Category(s): Electrical, Electrical > Computing Hardware, Electrical > Electronics & Semiconductors, Software & Algorithms > Artificial Intelligence & Machine Learning
Efficient Stochastic Compute-In-Memory Circuit for Multi-Level OR Accumulation (Case No. 2024-122)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel computational hardware that combines stochastic computing with compute-in-memory techniques that improves speed and computational efficiency. Background: In recent years, the need for advanced computational technologies has surged, driven by...
Published: 2/14/2025   |   Inventor(s): Sudhakar Pamarti, Jiyue Yang, Soumitra Pal, Puneet Gupta, Tianmu Li, Wojciech Romaszkan
Keywords(s): computational efficiency, Computer Architecture, Integrated Circuit, Logic Gate, neural network, Stochastic Computing (SC)
Category(s): Electrical > Computing Hardware, Electrical > Electronics & Semiconductors > Circuits
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