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Search Results - semiconductor+chip+foundries
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Design of High Thermal Conductivity Through-Glass Vias (TGVS) Interposers (Case No. 2026-157)
Summary: UCLA researchers in the Department of Mechanical and Aerospace Engineering have developed a novel method for producing electrically insulating, high–thermal conductivity through-glass vias. Background: Advanced semiconductor systems rely on 3D integrated circuits (3DICs) to meet rising demands for higher performance, reduced form...
Published: 3/5/2026
|
Updated: 2/20/2026
|
Inventor(s):
Tiwei Wei
Keywords(s):
3D integrated circuits (3DIC)
,
advanced semiconductor packaging
,
artificial intelligence accelerators
,
Composite Material
,
copper electroplating
,
cubic-octahedral diamond
,
diamond composites
,
diamond metallization
,
Doping (Semiconductor)
,
Electronics & Semiconductors
,
ferromagnetic semiconductor
,
Functional Materials
,
functional/composite materials
,
glass interposers
,
high-performance computing
,
Microelectronics Semiconductor Device Fabrication
,
microfabrication
,
Organic Semiconductor
,
physical vapor deposition (PVD)
,
Semiconductor
,
semiconductor chip foundries
,
Semiconductor Device
,
Semiconductor Device Fabrication
,
Semiconductor Ohmic Contact
,
Semiconductor Risk Assessment
,
Semiconductor Sapphire
,
Semiconductors
,
silicon interposers
,
thermal bottleneck
,
through-glass vias (TGVs)
Category(s):
Materials
,
Materials > Composite Materials
,
Materials > Functional Materials
,
Materials > Semiconducting Materials
,
Materials > Metals
,
Materials > Nanotechnology
,
Electrical
,
Electrical > Electronics & Semiconductors
Through-Glass Vias (TGVS) Thermal Management for Advanced 3DIC Packaging (Case No. 2026-156)
Summary: UCLA researchers in the Department of Mechanical and Aerospace Engineering have developed a novel approach to enhance the thermal performance of through-glass vias for advanced semiconductor packaging. Background: Advanced semiconductor systems rely on 3D integrated circuits (3DICs) to meet rising demands for higher performance, reduced...
Published: 3/5/2026
|
Updated: 2/20/2026
|
Inventor(s):
Tiwei Wei
,
Ye Yang
Keywords(s):
3D integrated circuits (3DIC)
,
advanced semiconductor packaging
,
artificial intelligence accelerators
,
copper electroplating
,
cubic-octahedral diamond
,
diamond composites
,
diamond metallization
,
Doping (Semiconductor)
,
Electronics & Semiconductors
,
ferromagnetic semiconductor
,
functional/composite materials
,
glass interposers
,
heat dissipation
,
high-performance computing
,
Microelectronics Semiconductor Device Fabrication
,
microfabrication
,
Organic Semiconductor
,
physical vapor deposition (PVD)
,
real-time thermal management
,
Semiconductor
,
semiconductor chip foundries
,
Semiconductor Device
,
Semiconductor Device Fabrication
,
Semiconductor Ohmic Contact
,
Semiconductor Risk Assessment
,
Semiconductor Sapphire
,
Semiconductors
,
silicon interposers
,
thermal bottleneck
,
thermal management
,
thermal management systems
,
through-glass vias (TGVs)
,
zzsemiconducting materials
Category(s):
Chemical
,
Chemical > Industrial & Bulk Chemicals
,
Chemical > Synthesis
,
Chemical > Chemical Processing & Manufacturing
,
Electrical
,
Electrical > Computing Hardware
,
Electrical > Electronics & Semiconductors
,
Materials
,
Materials > Metals
,
Materials > Semiconducting Materials
,
Materials > Functional Materials
,
Materials > Fabrication Technologies
,
Materials > Composite Materials
,
Software & Algorithms > Communication & Networking
Pulsed Dynamic Load Modulation Power Amplifier Circuit (Case No. 2006-330)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering developed a method for a power amplifier circuit with improved efficiency. Background: The wireless communication industry faces a demand for high data transfer rates with limited frequency resources. Existing methods of improving performance involve the use of power...
Published: 7/17/2025
|
Updated: 3/25/2024
|
Inventor(s):
Yuanxun Wang
,
Jinseong Jeong
Keywords(s):
Antennas/Wireless
,
attenuator
,
Doping (Semiconductor)
,
efficiency enhancement
,
Electronics & Semiconductors
,
energy-efficient wireless communication
,
Microelectronics Semiconductor Device Fabrication
,
Organic Semiconductor
,
power amplifier
,
Power Amplifier Circuit
,
pulsed load modulation
,
radiofrequency (RF) coil
,
radiofrequency signaling
,
RF signal
,
Semiconductor
,
semiconductor chip foundries
,
Semiconductor Device
,
Semiconductor Device Fabrication
,
Semiconductor Ohmic Contact
,
Semiconductor Risk Assessment
,
Semiconductor Sapphire
,
Semiconductors
,
variable load matching
,
Wireless
,
wireless capsule endoscopy
,
wireless communication
,
Wireless Sensor Network
,
zzsemiconducting materials
Category(s):
Electrical
,
Electrical > Signal Processing
,
Electrical > Wireless
,
Electrical > Electronics & Semiconductors
A High Throughput Thermal Compression Bonding Scheme for Interposer and Wafer-Scale Advanced Packaging Constructs (Case No. 2023-144)
Summary: UCLA researchers in the Department of Electrical and Computer and Engineering have introduced a scalable and rapid bonding method for dielet assembly on advanced packaging constructs, achieving a remarkable throughput of over 1100 units-per-hour, or 10-fold higher than the conventional assembly method. Background: In semiconductor packaging,...
Published: 10/20/2025
|
Updated: 2/14/2024
|
Inventor(s):
Subramanian Iyer
,
Krutikesh Sahoo
,
Haoxiang Ren
Keywords(s):
advanced packaging
,
advanced packaging constructs
,
dielet assembly
,
dielet bonding
,
Electronic Packaging
,
electronics packaging
,
Fabrication Technologies
,
face-to-face heterogeneous dielet bonding
,
heterogeneous integration
,
heterogenous electronic systems
,
high throughput
,
Instrumentation
,
Interposers
,
Microelectronics Semiconductor Device Fabrication
,
Organic Semiconductor
,
package scaling
,
Semiconductor
,
semiconductor chip foundries
,
Semiconductor Device
,
Semiconductor Device Fabrication
,
Semiconductors
,
thermal compression bonding
,
wafer-scale
,
wafer-scale computing
,
Waferscale Processors
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Electrical > Electronics & Semiconductors > Waferscale Computing
,
Materials
,
Materials > Semiconducting Materials
,
Materials > Fabrication Technologies
,
Electrical > Instrumentation
Synaptic Circuits Made From Transistors and Memory Capacitors (UCLA Case No. 2023-092)
Summary: UCLA researchers from the Department of Mechanical and Aerospace Engineering have developed a novel circuit architecture that emulates neural synapses for concurrent parallel computing. Background: Almost all modern computer chips consist of computing and learning processes that are implemented sequentially. To improve computing power,...
Published: 8/20/2025
|
Updated: 12/19/2023
|
Inventor(s):
Yong Chen
,
Zixuan Rong
Keywords(s):
Application-Specific Integrated Circuit
,
Artifical Intelligence (Machine Learning, Data Mining)
,
artificial electromagnetic materials
,
Artificial Intelligence
,
artificial intelligence augmentation
,
Artificial Neural Network
,
Artificial Neural Network Artificial Neuron
,
artificial-intelligent materials
,
autonomous control
,
computational efficiency
,
edge computing
,
Electronics & Semiconductors
,
Energy Efficiency
,
energy management
,
Integrated Circuit
,
Medical artificial intelligence (AI)
,
Neuromorphic circuits
,
parallel processing
,
parallel signal processing
,
processor design
,
Semiconductor
,
semiconductor chip foundries
,
Semiconductor Device
,
Semiconductors
,
synaptic resistor (synstor)
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Electrical > Signal Processing
,
Materials
,
Materials > Semiconducting Materials
,
Software & Algorithms
,
Software & Algorithms > Artificial Intelligence & Machine Learning