Search Results - software+%26+algorithms+%3e+communication+%26+networking

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Low-Latency Decoder for the Bahl, Cocke, Jelinek, Raviv Algorithm (Case No. 2025-114)
Summary UCLA researchers have developed a low-latency, high-throughput GPU-based implementation of the BCJR (Bahl-Cocke-Jelinek-Raviv) algorithm for decoding the CCSDS Serially-Concatenated Convolutionally-Coded Pulse-Position Modulation (SCPPM) code. The innovation reduces decoding latency from linear in the number of trellis stages to logarithmic...
Published: 9/15/2025   |   Inventor(s): Richard Wesel, Amaael Antonini, Egor Glukhov, Dariush Divsalar
Keywords(s):  
Category(s): Software & Algorithms, Software & Algorithms > Security & Privacy, Software & Algorithms > Communication & Networking, Mechanical, Mechanical > Aeronautics & Aerospace
Construction of Low-Rate LDPC Codes From Rate-½ CCSDS Standard LDPC Codes (Case No. 2025-243)
Reference: UCLA Case No. 2025-243. Please reach out to our office for more information.
Published: 9/12/2025   |   Inventor(s): Richard Wesel, Semira Galijasevic, Linfang Wang, Jon Hamkins, Dariush Divsalar
Keywords(s):  
Category(s): Software & Algorithms, Software & Algorithms > Communication & Networking, Software & Algorithms > Security & Privacy, Electrical, Electrical > Signal Processing
Method for Reducing Process Variation-Induced Threshold Voltage Mismatch in FD-SOI Transistors (Case No. 2025-271)
Reference: UCLA Case No. 2025-271 Please reach out to our office for more information.
Published: 9/12/2025   |   Inventor(s): Subramanian Iyer, Siyun Qiao, Jacklyn Zhu, Samuel Wang
Keywords(s):  
Category(s): Electrical, Electrical > Signal Processing, Electrical > Instrumentation, Electrical > Electronics & Semiconductors, Software & Algorithms, Software & Algorithms > Communication & Networking
Adaptively Secure Streaming Functional Encryption System and Method (Case No. 2024-243)
Summary UCLA (or affiliated) researchers have filed an application describing a method and system for enhancing the reliability and efficiency of [hardware/software/data] system operation via dynamic adaptation, error detection, or environmental/context-aware control. It aims to improve system robustness and performance under varying conditions through...
Published: 9/12/2025   |   Inventor(s): Amit Sahai, Alexis Korb, Pratish Datta, Jiaxin Guan
Keywords(s):  
Category(s): Software & Algorithms, Software & Algorithms > Communication & Networking, Software & Algorithms > Security & Privacy
Systems and Methods for an Agile and Explainable Exploration of Efficient Hardware/Software Codesigns of DNN Accelerators (Case No. 2024-017)
Summary Researchers at UCLA have developed a framework that uses bottleneck analysis to enable rapid, explainable hardware/software co-design for domain-specific computing systems. The system constructs a cost model to identify performance bottlenecks and uses that insight to guide efficient design space exploration, producing optimized hardware/software...
Published: 9/11/2025   |   Inventor(s):  
Keywords(s):  
Category(s): Software & Algorithms, Software & Algorithms > Communication & Networking, Electrical, Electrical > Signal Processing
Asymmetric Multi-Party Computation (Case No. 2023-177)
Summary UCLA researchers and co-inventors have developed a method and system for multi-party computation (MPC) that enables multiple parties to jointly compute a function over their inputs while keeping those inputs private. The scheme aims to improve efficiency, reduce interaction or rounds of communication, and support public verification or stronger...
Published: 9/11/2025   |   Inventor(s): Rafail Ostrovsky, Vipul Goyal, Chen-Da Liu Zhang
Keywords(s):  
Category(s): Software & Algorithms, Software & Algorithms > Communication & Networking
Multilevel Buffered Link (Case No. 2025-284)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel on-chip link that enhances communication performance and energy efficiency in modern integrated circuits. Background: On-chip communication enables data transfer between microchip components and is critical in computing, automotive, and industrial...
Published: 8/20/2025   |   Inventor(s): Sudhakar Pamarti, Chih-Kong Yang, Haris Suhail
Keywords(s): Bandwidth (Signal Processing), buffer layer, Clock Signal, efficiency bandwidth products, Electrical, Electrical Engineering, Energy Efficiency, energy efficient IoT, energy-efficient, high-data-rate links, high-speed communications, IoT communication, large bandwidth, low-power device, Network On A Chip, scalable communication, scalable fabrication, Signaling pathways, Signal-To-Noise Ratio, System On A Chip
Category(s): Electrical, Electrical > Electronics & Semiconductors > Circuits, Electrical > Computing Hardware, Software & Algorithms > Communication & Networking, Electrical > Signal Processing
AI-Powered System for Objective Surgical Skill Assessment in Open Procedures (Case No. 2025-207)
Summary: UCLA researchers in the Department of Surgery have developed a deep-learning architecture to efficiently and accurately assess surgeon skill level for improved medical training. Background: Objectively assessing surgical trainee performance during open procedures remains a significant challenge in medical education. Traditional evaluations...
Published: 8/13/2025   |   Inventor(s): Peyman Benharash, Armin Alipour
Keywords(s): AI, Artifical Intelligence (Machine Learning, Data Mining), Artificial Intelligence, deep-learning analysis algorithms, Education technology, image-guided surgery, medical bias reduction, Quality Control, Surgery, Surgical Instrument, Surgical Tools, teaching
Category(s): Life Science Research Tools > Lab Equipment, Life Science Research Tools > Research Methods, Medical Devices > Hospital Systems, Medical Devices > Monitoring And Recording Systems, Medical Devices > Surgical Tools, Software & Algorithms > AI Algorithms, Software & Algorithms > Artificial Intelligence & Machine Learning, Software & Algorithms > Communication & Networking, Software & Algorithms > Digital Health
Low-Latency Trellis Decoder (Case No. 2024-171)
Summary: UCLA researchers have developed a new algorithm to rapidly decode transmitted data packets with low latency. Background: Convolutional codes (CCs) are used extensively in wireless communication systems to improve data transmission reliability over noisy signals. CCs must be decoded following transmission to be accurately interpreted by receiving...
Published: 7/29/2025   |   Inventor(s): Richard Wesel, Amaael Antonini, Wenhui Sui
Keywords(s): AI algorithms, Algorithm, assistive communication, Cloud Computing, Communication & Networking, Communications Satellite, Convolutional codes, decoders, decoding algorithm, digital networks, energy-efficient wireless communication, graphics processing units, high-speed communications, IoT communication, low latency computing, Optical networks, parallel computing, quantum communication, scalable communication, signal decoding, Software & Algorithms, tail-biting convolutional codes, Telecommunication, trellis decoding, trellis diagrams, Viterbi Algorithm, wireless communication
Category(s): Electrical, Electrical > Signal Processing, Software & Algorithms, Software & Algorithms > Communication & Networking
Dual List Decoding (Case No. 2024-172)
Summary: UCLA researchers have developed a parallel list decoding algorithm to rapidly improve wireless communication data processing. Reference: Dual List Decoding (Case No. 2024-172) Background: Convolutional codes (CCs) are used extensively in wireless communication systems to improve data transmission reliability over noisy signals. During...
Published: 2/14/2025   |   Inventor(s): Richard Wesel, Bruce Qu, Amaael Antonini, Wenhui Sui
Keywords(s):  
Category(s): Software & Algorithms, Software & Algorithms > Communication & Networking
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