Search Results - parallel+computing

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Accurate Compute-In-Memory Accelerator With Multi-Level Analog Weight Storage (Case No. 2026-169)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a high-density, multi-level CTT-based compute-in-memory architecture that enables precise, energy-efficient analog computation directly within memory for high-performance computing. Background: Conventional digital processors for artificial intelligence...
Published: 6/3/2026   |   Updated: 6/3/2026   |   Inventor(s): Sudhakar Pamarti, Mohammadreza Zeinali, Samyak Chakrabarty, Vinod Kurian Jacob
Keywords(s): Advanced Computing / AI, advanced computing methods, AI, AI hardware, analog computing, Artificial Intelligence, artificial intelligence accelerators, Artificial Neural Network, CMOS, compute-in-memory, edge computing, Energy Efficiency, high-performance computing, Memory, parallel computing, Transistor, transistors
Category(s): Software & Algorithms > Artificial Intelligence & Machine Learning, Electrical, Electrical > Computing Hardware, Electrical > Electronics & Semiconductors, Electrical > Electronics & Semiconductors > Circuits, Electrical > Electronics & Semiconductors > Memory
Parallelizing the Diffusion Model for Breast CT Image Reconstruction from Sparse Cone-beam Projections
RPI ID: 2023-078-301 Innovation Summary: This technology introduces a tomographic image reconstruction system that leverages parallel denoising diffusion probabilistic models (DDPMs) to recover high-quality images from sparse projection data. The system uses a probabilistic framework to iteratively refine image estimates, enabling accurate reconstructions...
Published: 3/10/2026   |   Updated: 3/10/2026   |   Inventor(s): Wenjun Xia, Chuang Niu, Wenxiang Cong, Ge Wang
Keywords(s): Breast CT, deep reconstruction, denoising diffusion probabilistic model (DDPM), distributed computing, dual domain, parallel computing, sub-volume
Category(s): Computational Science and Engineering
Low-Latency Trellis Decoder (Case No. 2024-171)
Summary: UCLA researchers have developed a new algorithm to rapidly decode transmitted data packets with low latency. Background: Convolutional codes (CCs) are used extensively in wireless communication systems to improve data transmission reliability over noisy signals. CCs must be decoded following transmission to be accurately interpreted by receiving...
Published: 7/29/2025   |   Updated: 7/22/2024   |   Inventor(s): Richard Wesel, Amaael Antonini, Wenhui Sui
Keywords(s): AI algorithms, Algorithm, assistive communication, Cloud Computing, Communication & Networking, Communications Satellite, Convolutional codes, decoders, decoding algorithm, digital networks, energy-efficient wireless communication, graphics processing units, high-speed communications, IoT communication, low latency computing, Optical networks, parallel computing, quantum communication, scalable communication, signal decoding, Software & Algorithms, tail-biting convolutional codes, Telecommunication, trellis decoding, trellis diagrams, Viterbi Algorithm, wireless communication
Category(s): Electrical, Electrical > Signal Processing, Software & Algorithms, Software & Algorithms > Communication & Networking