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Search Results - niranjan+kulkarni
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A Robust Low Power Field Programmable Threshold Logic Gate Array
Existing complementary metal-oxide-semiconductor (CMOS) technologies are becoming obsolete because we have nearly reached the maximum capability of further miniaturizing computer chips built from modern, state-of-the-art materials. The semiconductor industry association predicts that further scaling is not sustainable and new technologies that can replace...
Published: 2/23/2023
|
Inventor(s):
Sarma Vrudhula
,
Niranjan Kulkarni
Keywords(s):
Networks, IT, Software and Communication
Category(s):
Semiconductor Devices
RRAM-Enhanced Differential Threshold Logic Gates That Are Robust For Low Voltage Operation
All digital circuits use sequences of logic gates that implement Boolean functions to store and transmit binary information. Threshold logic gates receive multiple input signals and produce a single output if the number of signals is below a hardwired threshold value, and can therefore process any Boolean function that might otherwise require multiple...
Published: 2/23/2023
|
Inventor(s):
Sarma Vrudhula
,
Jinghua Yang
,
Niranjan Kulkarni
,
Shimeng Yu
Keywords(s):
Materials and Electronics
Category(s):
Semiconductor Devices
A Robust Asynchronous Scan Chain and Scanning Mechanism for Testing of Digital VLSI Circuits
Very-large-scale-integration (VLSI) is a process of creating massive integrated circuits which enables design of all integrated circuit (IC) components onto a single chip. Thousands of transistors are combined onto a single chip, necessitating highly efficient data scanning in and out of each circuit. Typically the scan-in and scan-out operations are...
Published: 5/22/2024
|
Inventor(s):
Sarma Vrudhula
,
Niranjan Kulkarni
Keywords(s):
Materials and Electronics
Category(s):
Applied Technologies
,
Computing & Information Technology
,
Physical Science
,
Physics
,
Wireless & Networking
,
Semiconductors, Materials & Processes
Clock Skewing Strategy to Minimize Dynamic Power and Eliminate Hold Violations in ASIC Circuits
In digital systems, the difference in the arrival times at two registers is referred to as the clock skew between those registers. Clock skewing is a widely used optimization technique in conventional application-specific integrated circuit (ASIC) designs and typically implemented by introducing buffers to ensure clocking of components happens in the...
Published: 1/24/2024
|
Inventor(s):
Sarma Vrudhula
,
Niranjan Kulkarni
,
Aykut Dengi
Keywords(s):
Circuits
,
Integrated Circuits
,
Materials and Electronics
Category(s):
Applied Technologies
,
Computing & Information Technology
,
Physical Science
,
Semiconductor Devices
A Method of Obfuscating Digital Logic Circuits Using Threshold Voltage
Growing competition in the silicon industry has increased reverse engineering aimed at stealing hardware intellectual property. Due to the increase, hardware obfuscation, or concealing the functionality of a circuit design, has become vital. Digital circuits rely on a threshold logic gate function controlled by threshold voltages can be leveraged to...
Published: 5/22/2024
|
Inventor(s):
Sarma Vrudhula
,
Joseph Davis
,
Niranjan Kulkarni
,
Aykut Dengi
Keywords(s):
Materials and Electronics
Category(s):
Computing & Information Technology
,
Physical Science
Spintronic Threshold Logic Gate and Spintronic Threshold Logic Array
Within the field of digital logic circuits, there are special gates called threshold gates (TG), which operate differently from conventional CMOS logic gates. The study of threshold functions date back to the 1960s and an extensive body of literature exists on the subject covering their properties, methods for identifying them, function decomposition...
Published: 5/22/2024
|
Inventor(s):
Sarma Vrudhula
,
Nishant Nukala
,
Niranjan Kulkarni
Keywords(s):
Networks, IT, Software and Communication
Category(s):
Physical Science
,
Semiconductor Devices
,
Semiconductors, Materials & Processes