Search Results - ke+bai

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An infrastructure for memory management on LLM multi-core architectures
Limited Local Memory (LLM) multi-core architectures substitute cache with scratch pad memories (SPM). As a result, SPMs have much lower power consumption compared to other multi-core architectures. However, SPMs lack an automatic memory management system which presents a challenge to programmers as heap data sizes may be variable and data dependent....
Published: 2/23/2023   |   Inventor(s): Ke Bai, Aviral Shrivastava
Keywords(s): Algorithm Development, Cyber-Physical System, Memory, Simulation, Software
Category(s): Wireless & Networking
An Efficient Stack Data Management for Scratchpad Memory based Multi-core Processors
As technology scales, the number of cores in processors will rapidly increase in order to avoid the power wall. In processors that have hundreds and thousands of cores, traditional memory architectures – in which a coherent memory interface is provided to all the cores in hardware, will not be feasible. The memory management functionality is expected...
Published: 2/23/2023   |   Inventor(s): Ke Bai, Jing Lu, Aviral Shrivastava
Keywords(s): Algorithm Development, Cyber-Physical System, Memory, Software
Category(s): Computing & Information Technology