Overcoming Short Channel Barrier Effects of Field Effect Transistors

A design tool for overcoming short channel barrier effects of field effect transistors (FET).

Background:

The semiconductor industry constantly pushes innovation, demanding research and development into new materials, manufacturing processes, and designs.  Silicon is the most widely used semiconductor material in the electronic industry, so there is a constant market demand for high functioning and lower cost silicon-based computer chips. This technology introduces a superior chip design.

Technology Overview:

This technology provides a way to use depletion charges to introduce energy barriers around the channels of field effect transistors (FETs).  In depth simulation data substantiates a mechanism to change the energy profile of a FET, allowing reduction of energy consumption in various formats of transistors, including FETs, finFET, MOSFET, GAAFET and Resonant Tunneling Transistors.

https://buffalo.technologypublisher.com/files/sites/7678_in-part1.jpg

Please note, header image is purely illustrative. Source: Grafvision, stock.adobe.com

Advantages:

• Reduced energy consumption chip design
• Performance enhancement
• Cost reduction
• Reliability and durability

Applications:

• Silicon-based semiconductor materials
• Field Effect Transistors - finFET, MOSFET, GAAFET, resonance tunneling transistors

Intellectual Property Summary

US Provisional Patent Application 63/782,547 filed on April 2, 2025.

Stage of Development:

Design verification with extensive simulation.

Licensing Status:

Available for licensing or collaboration.

Additional Information:   An Approach to Use Depletion Charges for Modifying Band Profiles for Field-Effect Transistors”, arXiv:2501.14093 [cond-mat.mes-hall]