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Search Results - technology+classifications+%3e+computers+electronics+%26+software+%3e+processing+chips
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Reinforcement Learning for Fault-tolerant Energy-efficient NoC Design
Researchers at GW have developed a novel, cost-effective, energy-efficient computer architecture design based on reinforcement learning (RL) for use in various computing applications. The disclosed design has better fault-tolerance, reliability, network latency than existing solutions. The disclosed computer architecture design can include an Error...
Published: 7/30/2024
|
Inventor(s):
Ahmed Louri
,
Ke Wang
Keywords(s):
Category(s):
Technology Classifications > Computers Electronics & Software > Computing Architecture
,
Technology Classifications > Computers Electronics & Software > Cybersecurity
,
Technology Classifications > Computers Electronics & Software > Processing Chips
Efficient Floating-Point SRAM Compute-in-Memory by Harnessing Mantissa Addition
In the era of machine learning, particularly in the context of compute-in-memory (CIM) systems, has been rapidly evolving to meet the escalating demands of high computational efficiency and energy conservation. Existing SRAM CIM approaches have often focused on either fully digital or analog domains, leading to trade-offs between accuracy and energy...
Published: 7/30/2024
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Inventor(s):
Weidong Cao
Keywords(s):
Category(s):
Technology Classifications > Computers Electronics & Software
,
Technology Classifications > Computers Electronics & Software > Processing Chips
,
Technology Classifications > Computers Electronics & Software > Artificial Intelligence
,
Technology Classifications > Computers Electronics & Software > Cloud Computing
,
Technology Classifications > Computers Electronics & Software > Databases
SAM: Spintronic Approximate Memory
In the ever-evolving landscape of artificial intelligence (AI), achieving power efficiency without sacrificing accuracy has been a perennial challenge. Traditional methods, such as low supply voltage SRAM and low refresh rate DRAM, have aimed to reduce power consumption but have fallen short due to their lack of bitwise control over memory accuracy....
Published: 7/30/2024
|
Inventor(s):
Abdolah Amirany
,
Tarek El-Ghazawi
,
Hamidreza Imani Porshokouh
Keywords(s):
Category(s):
Technology Classifications
,
Technology Classifications > Computers Electronics & Software > Artificial Intelligence
,
Technology Classifications > Computers Electronics & Software > Computing Architecture
,
Technology Classifications > Computers Electronics & Software > Processing Chips
,
Technology Classifications > Computers Electronics & Software > Databases
SPACX: A Hardware and Algorithm Co-Optimized Photonic Deep Neural Network Computing Architecture
SPACX- A silicon-based Photonic accelerator for DNN Chiplets architecture The continuous increase in size and complexity of deep neural network (DNN) models leads to rapidly increasing demand for computing capacity which has outpaced the scaling capability of conventional monolithic chips. Chiplet-based DNN accelerators have emerged as a promising...
Published: 7/30/2024
|
Inventor(s):
Yuan Li
,
Ahmed Louri
Keywords(s):
Category(s):
Technology Classifications
,
Technology Classifications > Computers Electronics & Software
,
Technology Classifications > Computers Electronics & Software > Artificial Intelligence
,
Technology Classifications > Computers Electronics & Software > Processing Chips
,
Technology Classifications > Computers Electronics & Software > Computing Architecture
Hybrid interconnects for on-chip communication: A solution with low latency and efficient energy consumption
As computer chip feature size continue to decrease, power consumed due to on-chip communications will dramatically grow. This calls for new techniques which can provide higher bandwidth and data rates than over traditional electrical interconnects. Photonic interconnects can provide higher bandwidth and data rates. However optoelectronic...
Published: 7/30/2024
|
Inventor(s):
Shuai Sun
,
Volker Sorger
,
Tarek El-Ghazawi
,
Vikram Narayana
,
Abdel-Hameed Badawy
Keywords(s):
Category(s):
Technology Classifications > Industrial or Consumer Tech > Energy Infrastructure and Environment
,
Technology Classifications > Industrial or Consumer Tech > Materials
,
Technology Classifications > Computers Electronics & Software > Processing Chips
Hybrid Photonic Plasmonic Non-blocking Wide Spectrum WDM On-chip Router
Researchers at GW have developed a novel hybrid photonic plasmonic non-blocking wide spectrum WDM On-chip Router. The disclosed invention is highly energy efficient. For example, the design could be used as optical routers in optical networks with non-blocking routing strategy, femtojoule energy efficiency and ultra-high operating speed. Further, through...
Published: 7/30/2024
|
Inventor(s):
Shuai Sun
,
Volker Sorger
,
Tarek El-Ghazawi
,
Vikram Narayana
Keywords(s):
Category(s):
Technology Classifications > Computers Electronics & Software > Sensors
,
Technology Classifications > Computers Electronics & Software > Computing Architecture
,
Technology Classifications > Computers Electronics & Software > Cloud Computing
,
Technology Classifications > Computers Electronics & Software > Databases
,
Technology Classifications > Computers Electronics & Software > Processing Chips
Graphene-based Plasmonic Slot Electro-optic Modulator
Researchers at GW have developed a novel, cost-effective solution to perform electrical optical conversion. The solution can be a device or a design that can be graphene-based and can be a plasmonic slot electro-optic modulator as can be appreciated. The solution has a range of applications and advantages. For example, the novel solution is energy efficient,...
Published: 7/30/2024
|
Inventor(s):
Zhizhen Ma
,
Volker Sorger
Keywords(s):
Category(s):
Technology Classifications > Computers Electronics & Software > Processing Chips
,
Technology Classifications > Computers Electronics & Software > Sensors
,
Technology Classifications > Diagnostics > Precision Medicine
All Optical Fast Fourier Transform on Chip
Researchers at GW have developed a novel solution that can perform Discrete Fourier Transform (DFT) in a nontrivial computation by parallelism. The novel solution can be a device involving All Optical Fast Fourier Transform (OFFT) on Chip which has the benefits of being a high speed, low energy, and powerful signal processing tool. The novel solution...
Published: 7/30/2024
|
Inventor(s):
Volker Sorger
,
Hani Nejadriahi
Keywords(s):
Category(s):
Technology Classifications > Computers Electronics & Software > Processing Chips
,
Technology Classifications > Computers Electronics & Software > Sensors
EZ-PASS: An Energy & Performance-Efficient Power-gating Router Architecture for Scalable NoCs
Researchers at GW have developed a novel router architecture that is capable of being implemented on various networking applications. The router architecture can be used for high-performance communication which only consumes little energy while still providing high speed. This architecture has a greater impact on applying power-gating for various interconnects...
Published: 7/30/2024
|
Inventor(s):
Ahmed Louri
,
Hao Zheng
Keywords(s):
Category(s):
Technology Classifications > Computers Electronics & Software > Computing Architecture
,
Technology Classifications > Computers Electronics & Software > Processing Chips
The Reconfigurable Optical Coprocessor
Researchers at GW have developed a novel, cost-effective, energy-efficient solution having enhanced performance, programmable array of photonic R (and LC) components using nanoplasmonics technology in order to solve systems that can be described through differential equations and converted into electrical analogues. The solution involves computing processes...
Published: 7/30/2024
|
Inventor(s):
Volker Sorger
,
Tarek El-Ghazawi
,
Shuai Sun
,
Vikram Narayana
,
Abdel-Hameed Badawy
Keywords(s):
Category(s):
Technology Classifications > Computers Electronics & Software > Robotics
,
Technology Classifications > Computers Electronics & Software > Sensors
,
Technology Classifications > Computers Electronics & Software > Processing Chips
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