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Hard matrix multiplier blocks in field-programmable gate arrays
Rapidly changing algorithms and network architectures in the field of machine learning make Field Programmable Gate Array (FPGA) based designs an attractive solution for accelerating neural networks. However, the generic building blocks available in current FPGAs limit the acceleration that can be achieved. This technology, developed by researchers...
Published: 12/8/2023   |   Inventor(s): Lizy John, Aman Arora
Keywords(s): Machine learning
Category(s): Computer software > AI > Machine learning