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Slew-Driven Clock Tree Synthesis
PAGE TITLE Slew-Driven Clock Tree Synthesis PAGE SUMMARY Reduction in power consumption without sacrificing processing speed is increasingly important objective in integrated circuit design nowadays. Power distribution of the clock net contributes a large fraction of the total power consumption. Thus, the generation and distribution of this clock signal...
Published: 5/19/2022   |   Inventor(s): Baris Taskin, Ahmet (can) Sitik, Emre Salman, Weicheng Liu
Keywords(s):  
Category(s): Hardware, Circuits & Sensors, Hardware, Circuits & Sensors > Hardware: Clock, Hardware, Circuits & Sensors > Hardware: Electronic Components, Hardware, Circuits & Sensors > Hardware: Microprocessor Design
Methods and Computer-Readable Media for Synthesizing a Multi-Corner Mesh-Based Clock Distribution Network for Multi-Voltage Domain and Clock Meshes and Integrated Circuits
PAGE TITLEOverviewPAGE SUMMARY One aspect of the invention provides a including: (a) placing N×N max size buffers at an (n−1)st level of one of the voltage domains i until a maximum slew slewmax within the voltage domain i exceeds a defined slew threshold; (b) calculating maximum insertion delay values for all cases for each of the voltage...
Published: 7/24/2024   |   Inventor(s): Baris Taskin, Ahmet (can) Sitik
Keywords(s):  
Category(s): Hardware, Circuits & Sensors, Hardware, Circuits & Sensors > Hardware: Clock, Hardware, Circuits & Sensors > Hardware: Microprocessor Design, Hardware, Circuits & Sensors > Hardware: Electronic Components