Ultra-low Power Timing Circuit with PLL Locking

INV-23015

Background:

In fields like computing, telecommunications, and navigation, the demand for precision timekeeping has intensified, pushing the limits of current timing solutions. As the backbone of digital system performance and reliability, clock accuracy is crucial, especially for ensuring synchronization. However, existing clocking methods struggle with stability and accuracy, leading to issues like jitter and drift that hinder synchronization across devices and networks. This challenge is most pronounced in high-speed data transfer scenarios, where minor timing inaccuracies can result in significant errors and compromise data integrity. The industry's need for more precise and stable clocks is thus critical, highlighting the shortcomings of traditional timing approaches in meeting today's technological demands. The precision requirement for navigation application is even more stringent.

Description:

Northeastern researchers have developed a precision clocking technology that centers on a crystal oscillator (XO) core, enhanced with a phase-locked loop (PLL) for superior synchronization with an external reference clock. By integrating varactors to form a voltage-controlled oscillator (VCO) variant of the XO, the system enables fine-tuning of frequency through a control voltage. The addition of a phase frequency detector (PFD) facilitates precise comparison between the XO's output and the reference clock. This innovative approach ensures unparalleled frequency control and stability by utilizing the PLL architecture to adjust the VCO based on feedback from the PFD comparison. As a result, this technology overcomes the common challenges of instability and inaccurate time measurement found in traditional clocking methods, offering a more stable and accurate solution for applications requiring precise synchronization. The timing error is reduced down in a few parts-per-billion (ppb).

Benefits:

• Enhanced precision and stability in timekeeping.
• Superior synchronization with external reference clocks.
• Elevated performance within high-speed communication networks.
• Minimized timing-related errors in navigation and computing systems.
• Reduction in jitter and drift in clock outputs.

Applications:

• GPS-denied Navigation: Navigating and orienting UAV’s in the absence of GPS
• Global Navigation Satellite Systems (GNSS): Ensures precise timekeeping for accurate positioning and navigation.
• High-Speed Data Transmission Networks: Provides stable clock sources to maintain data integrity and speed.
• Distributed Computing Systems: Enables synchronized timing across multiple computing units for efficient processing.
• Telecommunications Infrastructure: Facilitates precise frequency control for reliable communication services.
• Large-Scale Scientific Experiments and Telescopes: Supports tight synchronization necessary for accurate data collection and analysis.

Opportunity

• Research collaboration
• Licensing

Seeking

• Development Partner
• Commercial Partner
• licensing