PAGE TITLE
Overview
PAGE SUMMARY
Making electronics last longer is a major goal for all electronic device manufacturers, from wearable and medical electronics to computer processors and the world’s fastest supercomputers. There are many design knobs that elongate battery life including display technology, energy storage technology and integrated circuit energy efficiency. 40% of IC energy consumption is derived from IC clocking, yet the tools developed by the major EDA company have not evolved their clock distribution network (CDN) design stage substantially in recent years, in part because the processor design companies (e.g. Intel, IBM, AMD) have elected to use customized tools. Electronic design companies other than those that design for processors, for instance for small application-specific integrated circuits (ASICs) such as those used in automotive, medicine, toy, internet infrastructure industries, have relied on the standard EDA tool implementations of the major EDA companies. To overcome the limitations of existing EDA tools, a team of Drexel researchers has developed RotaSyn, a tool that targets the integrated circuit energy efficiency level by automating resonant rotary clock design on processors/ASICs in the 100MHz to 5GHz range. Integrating seamlessly with the industry-standard computer-aided design tools for electronic design, integrated circuit design engineers can use RotaSyn to improve the energy efficiency of their products. The energy efficiency manifests itself in enabling electronics that burn less power, have higher performance and have reduced area.
APPLICATIONS
TITLE: Applications
EDA clock design tool - automates resonant rotary clocking on processors/ASICs (computers, cell phones, medical electronics, IoT processors, etc.) in the 100MHz to 5GHz range
ADVANTAGES
TITLE:Advantages
Power: Clock tree power reduction of 80% and total power reduction of 16%
Performance: Enabling a wider clock frequency of operation from high MHz to multi-GHz
Area: Reduction of chip area dedicated to clock circuitry by 30% or more, i.e. smaller form factor.
FIGURES: Insert Figure Image Inside Figure Tags within Editor
Figure 1
Figure 1 Caption:
Figure Caption Text Goes Here
IP STATUS
Intellectual Property and Development Status
United States Issued Patent- 9,484,896
http://patft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9484896.PN.&OS=PN/9484896&RS=PN/9484896
PUBLICATIONS
References
Pubinfo should be the citation for your publication. Publink is the full url linking to the publication online or a pdf.
Y. Teng and B. Taskin, “Frequency-centric resonant rotary clock distribution network design,” in Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, November 2014, pp. 742–749.
http://ieeexplore.ieee.org/document/7001434/
Commercialization Opportunities
----------------------------------------------
Contact Information
Robert B. McGrath, Ph.D.
Senior Associate Vice Provost
Office of Technology Commercialization
Drexel University
3180 Chestnut Street, Ste. 104
The Left Bank
Philadelphia, PA 19104
Phone: 215-895-0303
Email: RBM26@Drexel.edu
For Technical Information:
Baris Taskin, Ph.D.
Associate Professor
Department of Electrical and Computer Engineering
3141 Chestnut Street
Philadelphia, PA 19104-2875
Phone: (215) 895-5972
E-mail: taskin@coe.drexel.edu
Web: http://vlsi.ece.drexel.edu