UCLA researchers have developed a semiconductor device that incorporates a phonon bridge layer between the semiconductor layers and the gate electrode, topped with a diamond layer, aimed at enhancing thermal performance and device stability. In this architecture, the gate electrode is embedded in the phonon bridge layer and contacts the underlying semiconductor, while the diamond overlayer helps with heat dissipation and overall thermal management.
As semiconductor devices scale and power densities increase, managing heat and phonon (lattice vibration) transport becomes a critical limiting factor. High junction temperatures degrade performance, reduce reliability, and limit switching speeds. Traditional approaches to improve thermal conductivity (e.g. heat sinks, packaging solutions) are often external, bulky, or insufficient for very high power / high frequency applications. There is a need for integrated device structures that improve thermal management internally, reduce thermal bottlenecks, and allow high performance without sacrificing size or efficiency.
This technology introduces a layered semiconductor device in which the structure includes multiple semiconductor layers, topped by a phonon bridge layer. The gate electrode is set into the phonon bridge layer, making contact with the upper surface of the semiconductor device. A diamond layer is then formed over the phonon bridge layer. The phonon bridge is constructed of materials chosen to facilitate phonon transport (e.g. high thermal conductivity, matched lattice or phonon dispersion properties) and is physically integrated so that heat generated at the gate region is efficiently conducted upward through the bridge and out through the diamond layer. This reduces thermal resistance and improves heat spreading, enabling improved thermal performance in high power/temperature operation. The method of making the device includes fabrication steps to form the semiconductor layer stack, deposit and pattern the phonon bridge, embed the gate electrode, and then overgrow or attach the diamond layer.
Improved thermal management: reduced thermal resistance from gate region to ambient via the phonon bridge + diamond layer
Higher power / frequency reliability due to better heat dissipation
Embedded design means less reliance on external cooling or bulky thermal management hardware
Diamond layer provides high thermal conductivity and robust mechanical/thermal properties
Potential improvements in device lifetime and performance under thermal stress
Compatible with standard semiconductor fabrication flows, with additional steps for bridge and diamond deposition
Power transistors and RF devices that generate significant heat (e.g. GaN, SiC, MOSFETs)
High frequency / high power integrated circuits in telecommunications or RF front ends
Devices in harsh environments or elevated ambient temperatures where thermal stress is a major limitation
Electric vehicle power electronics, power converters, switching regulators
High density computing, data center hardware, or hardware accelerators where thermal bottlenecks limit scaling
WO2025/178644 A1 — Semiconductor device and method of making the same Semiconductor device and method of making the same (WO2025178644A1) Published by WIPO; relates to novel device structure with phonon bridge and diamond overlayer. Patentscope