Opto-Electrical Cross-Connect Switch-Receiver

RPI ID:
2017-055-401 / 2017-055-601

Innovation Summary:
An integrated cross‑point architecture connects a 2D array of photodetectors to multiple transimpedance amplifiers (TIAs) through a CMOS‑controlled MOS switch matrix, enabling fully programmable N×M optical‑to‑electrical routing. Avalanche photodiodes (APDs) interface directly to the switch network, with intrinsic device inductance and degeneration resistors used to tune the composite input network against MOS parasitic capacitance for extended bandwidth, bias stability, and linearity. Detectors, switches, and TIAs are co‑located on the same IC to minimize interconnect length, input capacitance, and noise, while an imaging or multi‑element optical front end maps spatial channels onto the detector grid for subsequent electronic cross‑connection. Multi‑device configurations can incorporate optical cross‑connect elements and laser‑diode drivers, enabling fan‑in/fan‑out, regeneration, and full‑duplex node designs for energy‑efficient optical fabrics.
 

Challenges / Opportunities:
At high data rates, managing crosstalk, switch feedthrough, and APD excess noise requires careful floorplanning, shielding, and bias‑network design, as well as robust TIA architectures. Scaling to large matrices introduces RC delay, power density, and thermal‑management constraints, motivating hierarchical tiling, adaptive biasing, and per‑path calibration to maintain uniform gain and bandwidth. Co‑packaged optics and silicon‑photonics tiles can address alignment and coupling challenges but add packaging complexity and yield considerations. Significant opportunities exist to integrate on‑chip DSP, CDR, monitoring, and self‑test for closed‑loop switching, to support WDM and SWIR operation with hybrid detectors, and to enable rapidly reconfigurable, security‑aware optical fabrics for data centers, LiDAR, free‑space links, and aerospace/automotive networks.
 

Key Benefits / Advantages:
✔ On‑chip cross‑point matrix links APDs to TIAs with microsecond‑scale reconfiguration
✔ Programmable detector‑to‑amplifier mapping for flexible N×M connectivity
✔ IC integration minimizes parasitics, latency, and power versus discrete or MEMS‑based

cross‑connects
✔ Supports optical fan‑in/fan‑out, regeneration, and cascaded multi‑node architectures
✔ Compatible with imaging optics, co‑packaged optics, and silicon‑photonics front ends
✔ Energy‑efficient platform for dynamically provisioned optical networks and sensing arrays

Applications:
• Hyperscale and edge data‑center optical fabrics and backplanes
• High‑performance computing interconnects and optical backplanes
• Reconfigurable imaging and sensing arrays, including LiDAR and free‑space optical links
• Telecom access/metro optical switching and secure, segmented optical networks
• Optical test and measurement matrices for photonics laboratories
• Aerospace and automotive optical communication and sensor routing

Keywords:
optical cross‑connect, cross‑point switch matrix, avalanche photodiode (APD), transimpedance amplifier (TIA), CMOS photonic integration, co‑packaged optics

Intellectual Property:

Issued US patent no. US12167184B2

Published US patent application no. US20250097611A1