Highly Boron Doped Ultrashallow Junction Technology
CMOS technology is rapidly scaling towards 45nm and beyond, with junction depths decreasing towards 10nm. We present a method employing existing ion implantation and annealing equipment having the capacity to achieve these depths with high dopant activation. The method is expected to work over several future device generations. We now seek partners with the vision to recognise the unique competitive advantage of this technology.
Low temperature source-drain process for 45nm CMOS and beyond
We have demonstrated for the first time electrically active Boron concentrations approaching 1021 cm-3 using 700oC annealing with no preamorphisation and no flash or laser processing. In our advanced vacancy engineering approach, boron is implanted into crystalline silicon prepared with a high concentration of excess vacancies.
Ion implantation in the tens of keV range ensures that the vacancy engineering implant is self-aligned to the gate stack and that vacancies and dopant populate the surface layer while vacancy generating ions reside away from the active layer.