Design Techniques for Area and Energy Efficient Time Domain Signal Processing

NU 2015-181

Inventors

Jie Gu*

Short Description

New design techniques to optimize area and energy consumption in integrated circuits 

Abstract

Conventional integrated circuits for digital signal processing have been largely difficult to improve due to energy and area consumption constraints. A new signal processing technique, more specifically a time domain signal processing, recently began to show promise in a fundamental improvement over traditional design methodology. A Northwestern professor proposes new design techniques which can dramatically improve the area and energy efficiency of time domain signal processing. Two proposed techniques include: (1) double encoding non-complementary logic design, contrary to the conventional complementary CMOS logic design; and (2) energy efficient time encoding circuit design compared with earlier reported design. By utilizing these techniques, the limitations of traditional design methodology can be overcome, where further efficiencies may reduce the cost of chip production and minimize energy consumption.

Applications

• Conventional digital signal processing
• Emerging technical fields, such as facial recognition, neural network, neuromorphic computing

Advantages

• The proposed double encoding non-complementary design methodology reduce energy and area consumption by up to 50% compared with existing solution.
• The proposed energy efficient time encoder reduce energy and area consumption by up to 5X compared with existing solution.

Publication

Chen Z and Gu J (2016) Analysis and Design of Energy Efficient Time Domain Signal Processing. Proceedings of the 2016 International Symposium on Low Powered Electronics and Design. pp. 100-105.

IP Status

Provisional patent application has been filed.