Low-Power, Multi-Phase, CMOS-based Ring Oscillator Circuit
Technology Summary
CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS), and other analog and digital logic circuits. A CMOS ring oscillator circuit is an odd number (N) of inverting stages connected in series with the output fed back to the input as shown in the figure below. The ring oscillator and related circuits are fundamental building blocks used in a broad spectrum of applications such as clock oscillators in computers and carrier frequency generator phase locked loops in wireless communications. It is also a fundamental circuit for evaluating the intrinsic speed of a CMOS logic process.
The ring oscillator circuit has many uses in electronics and communications. Applications include IoT edge devices, start-up circuits in c energy harvesting systems, time to digital converters, time domain neural networks, voltage-controlled ring oscillators, and frequency locked loops.
A VDD controlled, low-power, CMOS-based ring oscillator that provides several phase shifted outputs based on the laddered inverter quantizer (LIQAF) circuit. VDD is the input and the outputs are the intermediate LIQAF outputs. The circuit achieves several phase shifted waveforms by the usage of the LIQAF circuit as a chain of parallelized inverters. These inverters each have their own propagation delay which all give us a phase shifted version of the same waveform. The results demonstrate that the proposed circuit can operate at low-power consumption from a wide range of supply voltages with robust operation across process and temperature variations. Further, the circuit can inherently provide variable widths of the output pulses which can be benefitable in designing pulse width modulation circuits.
Key Advantages
Market Opportunities
Stage of Development
Proof of Concept
Patent Status
Issued: https://patents.google.com/patent/US11664787B2
References & Publications
M. D. Edwards and M. Alhawari, "A Laddered-Inverter Nonoverlapping Clock Generator," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 33, no. 5, pp. 1304-1313, May 2025, doi: 10.1109/TVLSI.2025.3537456.