This invention introduces a method for creating ultra-thin, highly conductive carbon-based wiring, called graphene interconnects, on metal surfaces at low temperatures. These interconnects are intended to replace traditional copper wiring used in advanced semiconductor devices, particularly those based on Gate-All-Around Field-Effect Transistors (GAAFETs). As chip features become smaller, conventional copper interconnects suffer from rising resistance and reliability issues due to size constraints and material limitations. This technology forms graphene structures using a bottom-up synthesis process that operates at temperatures below 400°C, which is low enough to fit within standard chip manufacturing workflows. The process requires only industry-compatible pressure conditions, ranging from atmospheric pressure down to low vacuum. The resulting graphene lines are chemically stable and capable of supporting high-speed signal transmission in extremely compact layouts. Background: In advanced computer chips, tiny metal lines, called interconnects, carry signals and power between transistors. While copper has long been the standard for this role, it performs poorly at nanometer-scale dimensions, where electron scattering and grain boundaries increase resistance and waste energy. Although graphene has been studied as a potential replacement, traditional methods to grow it require high temperatures and specific substrates, making them difficult to integrate with existing chip fabrication steps. This invention enables graphene to be formed directly on metal surfaces like titanium nitride and copper using commercially available molecular precursors. This process occurs at relatively low temperatures and avoids the need for transferring graphene from one surface to another, which typically introduces defects and alignment issues. Applications:
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