Advanced Radiative Cooling System for CMOS Chips Using Integrated Metal-Optic Layers

This invention leverages recent advancements in nanophotonics and electronics to develop an advanced radiative cooling system for Complementary Metal-Oxide-Semiconductor (CMOS) chips with minimal change to the CMOS chip design. This cooling system incorporates metal-optic layers directly into the chip’s architecture within bulk CMOS foundry processes, demonstrating that the back-end-of-the-line (BEOL) can serve as effective metal-optic devices. The process enhances cooling efficiency while maintaining the chip’s structural integrity and performance. Additionally, it enables creating local thermal emitters that can reduce the temperature of “hot spots” within the chip that are difficult to target for cooling. This innovative approach addresses the escalating cooling demands of modern CMOS chips, particularly in high-performance computing and dense server environments, representing a paradigm shift in thermal management strategies for semiconductor devices while potentially enabling a new generation of high-performance, thermally stable electronic components.

Background: 
Thermal management of CMOS chips is of paramount importance and is one of the main challenges to increase the number of devices on chips and to employ more advanced technologies like silicon on insulator processes. In the context of semiconductor technology, CMOS chips have traditionally relied on standard cooling mechanisms, such as convection cooling and/or aluminum/copper heat sinks, due to their simplicity and cost-effectiveness. However, these methods are becoming increasingly insufficient as chip designs grow more complex and power densities increase. Radiative cooling, a newer prospect in this field, offers a passive method by enhancing the natural emission of infrared radiation to dissipate heat. However, a significant challenge with radiative cooling lies in the development and integration of materials that possess the right emissive properties without interfering with the electronic functions of the chip. 

Applications: 

  • Semiconductor manufacturing
  • High-performance computing


Advantages: 

  • Targets “hot spot” cooling 
  • Passive cooling method
  • Reduced product loss during manufacturing
  • Greater efficiency in manufacturing
Patent Information: