2020-861 Superconducting Silicon Interconnect Fabric (Superconducting-IF)

SUMMARY

UCLA researchers in the Department of Electrical and Computer Engineering have developed a platform that can control heterogeneous integration of dies with 10 μm interconnect pitches and extends the fabrication of Silicon Interconnect Fabric (Si-IF) into the cryogenic and superconducting temperature ranges.

BACKGROUND

Quantum computing is an essential part of next generation heterogeneous computing. The computational unit, quantum bit, is very sensitive to energy loss and noise, especially thermal noise. Although various types of quantum computers exist, superconducting quantum computers are an excellent candidate to reduce the mentioned noise and loss problems. Superconducting quantum computers utilize integration method bumps to adhere superconducting dies to substrates. It is impossible, however, to manipulate the height of the bumps with current integration methods during fabrication when the area of the wetting layer is fixed. This has also limited fabrication of silicon interconnects to above cryogenic and below superconducting temperatures.  Therefore, a method that can extend the temperature of interconnects and control the height of integration method bumps during fabrication is needed.

INNOVATION

Superconducting-IF is a platform that allows heterogeneous integration of dies with controlled bump height on silicon wafers and extends the fabrication of silicon interconnects to cryogenic and superconducting temperature ranges. The platform has been successfully prototyped and demonstrated to achieve 10 μm interconnect pitches. The Si-IF is an advanced packaging technology that possesses fine-pitch (≤10 𝜇𝑚), metal-to-metal bonding, high bandwidth, and low latency characteristics. The platform also has low power generation and low power dissipation and also extends the ability to integrate bumps above cryogenic and below superconducting temperature ranges.

POTENTIAL APPLICATIONS

• Integrated on-chip-like ultra-fast control/readout cryogenic and superconducting integration platform for quantum computers

ADVANTAGES

• 10 μm interconnect pitches
• Ability to fabricate silicon interconnects at cryogenic and superconducting temperatures
• Defects reduction
• Higher durability, stability, and uniformity
• Native metal oxide reduction
• Suit for multi-dielet integration
• High bandwidth
• Low power generation
• Low power dissipation
• Low latency

RELATED MATERIALS

• Yu-Tao Yang et al., “Demonstration of Superconducting Interconnects on the Silicon Interconnect Fabric Using Thermocompression Bonding,” IEEE 70th Electronic Components and Technology Conference (ECTC), Jun 1-30, 2020, Vista, FL.

STATE-OF-DEVELOPMENT

Platform has been successful prototyped and reduced to practice.