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CSALT: Context switch aware large translation look-aside buffer (TLB)
BackgroundContext Switch Aware Large TLB (CSALT) addresses the problem of increased TLB miss rates and their adverse impact on data caches. The invention proposes to partition the on-chip caches to house translation entries (TLB entries/page table entries) alongside data. The partitioning is achieved by means of a low overhead cache partitioning algorithm...
Published: 12/8/2023   |   Inventor(s): Lizy John, Yashwant Marathe, Jee Ho Ryoo, Nagendra Gulur
Keywords(s): Computer hardware
Category(s): Physical sciences > Computer hardware