Search Results - nan+sun

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Analog-to-digital converter (ADC) technologies
Background Dr. Nan Sun and his research group have developed a portfolio of analog to digital converter (ADC) technologies that are available for licensing. Overall, Dr. Sun’s lab develops high-performance analog/mixed-signal circuits and architectures, with research efforts focusing primarily on designing low-power, high-speed, and high-resolution...
Published: 11/1/2023   |   Inventor(s): Nan Sun, Wenjuan Guo, Long Chen, Xiyuan Tang, Linxiao Shen, Chen-Kai Hsu
Keywords(s):  
Category(s): Physical sciences > Computer hardware, Physical sciences > Semiconductor
Variable gain amplifier utilizing positive feedback and time-domain calibration
BackgroundIn discrete-time systems, including ADCs, a voltage amplifier is necessary to increase the signal swing for further processing. Traditional precision amplification techniques, including closed-loop amplifiers, become less viable in nanometer-scale processes due to reduced transistor intrinsic gain. Additionally, these devices generally consume...
Published: 12/8/2023   |   Inventor(s): Nan Sun, Miguel Gandara
Keywords(s):  
Category(s): Physical sciences > Semiconductor
Floating inverter pre-amplifier based dynamic comparator
Background Two technologies are touched upon. First is an energy-efficient comparator, followed by a time domain two-step capacitance-to-digital converter. Comparators bridge the analog and digital world. A low-power, low-noise comparator is critical for analog-to-digital converters. A comparator consists of a pre-amp followed by a latch. Dynamic comparators,...
Published: 1/11/2024   |   Inventor(s): Nan Sun, Xiyuan Tang
Keywords(s):  
Category(s): Physical sciences > Semiconductor
Continuous-time SAR ADC
Background The kT/C noise poses a fundamental signal to noise ratio (SNR) limit for discrete-time (DT) analog to digital converters (ADCs) with the front-end sampling operation. To achieve a high resolution, the sampling capacitor needs to be sufficiently large (e.g., 3pF for 80-dB SNR assuming 2Vpp swing) and it has to be quadrupled for every 1-bit...
Published: 12/8/2023   |   Inventor(s): Nan Sun, Linxiao Shen
Keywords(s):  
Category(s): Physical sciences > Semiconductor
Inverter stacking amplifier
BackgroundThe front-end amplifier typically dominates the overall noise and power performance of a sensor system. There exists a fundamental tradeoff between noise and power for an amplifier, which is well captured by the noise efficiency factor (NEF). Minimizing this tradeoff (or NEF) is crucial for a wide range of power and energy constrained applications,...
Published: 12/8/2023   |   Inventor(s): Nan Sun, Linxiao Shen
Keywords(s):  
Category(s): Physical sciences > Semiconductor
Noise and spur reduction technique in fractional-N PLL
Background Delta-Sigma fractional-N PLL plays an important role in modern electronic systems. Unlike integer-N PLLs, fractional-N PLLs allow synthesis of frequencies that are a fraction of the reference frequency. Thus, a fractional-N PLL can use a higher reference frequency than an integer-N PLL for the same frequency resolution. It allows a wider...
Published: 12/8/2023   |   Inventor(s): Nan Sun
Keywords(s):  
Category(s): Physical sciences > Semiconductor
Time-domain capacitance-to-digital converter with zoom-in SAR
BackgroundTwo technologies are touched upon below—an energy-efficient comparator followed by a time domain two-step capacitance-to-digital converter. Comparators bridge the analog and digital world. A low-power, low-noise comparator is critical for analog-to-digital converters. A comparator consists of a pre-amp followed by a latch. Dynamic comparators,...
Published: 12/8/2023   |   Inventor(s): Nan Sun, Xiyuan Tang
Keywords(s): Capacitance-to-digital converter
Category(s): Physical sciences > Semiconductor