Smaller, More Efficient RAM Cell for Computing-In-Memory

NU 2020-229

INVENTORS
Jie Gu*
Zhengyu Chen

SHORT DESCRIPTION
New hardware (RAM cell) developed to support machine learning and integration in wearable devices, high performance datacenters or PCs.

BACKGROUND
Machine learning is a data intensive task. Rather than store information on disk drives or SSDs, better performance in terms of lower latency and energy consumption can be achieved by keeping all application data in the random access memory (RAM) on chip. The latency/energy consumption involved in moving data off-chip is known as the memory wall. Storing data in RAM bypasses the memory wall and brings the data closer to the processor; this is known as computation-in-memory, or CIM

ABSTRACT
This technology is a nonvolatile, digital analog RAM cell (DARAM) that has much smaller surface area (compact) and lower energy consumption (efficient) to accelerate machine learning tasks as well as enable integration into portable/wearable devices, high performance computing clusters or personal computers. Traditional RAM solutions such as SRAM cells use more transistors, requiring higher operation complexity and lower data density than the proposed technology. Emerging products on the market include MRAM, RRAM, FeRAM, EEPROM, and PCRAM. The techniques used to achieve the energy and area efficiency may be suitable to optimize these emerging technologies.

APPLICATIONS

• RAM cell (hardware) developed to accelerate machine learning and for compact integration in high performance computing electronics.

ADVANTAGES

• Smaller memory cell size uses lower operation complexity
• Simpler operations leads to higher energy efficiency

PUBLICATION
Chen Z, Chen X and Gu J (2021) 15.3 A 65nm 3T Dynamic Analog RAM-Based Computing-in-Memory Macro and CNN Accelerator with Retention Enhancement, Adaptive Analog Sparsity and 44TOPS/W System Energy Efficiency.  2021 IEEE International Solid- State Circuits Conference.

IP STATUS
A provisional application has been filed.